On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays

DOI10.1109/12.5988zbMath0709.94597OpenAlexW2096804541MaRDI QIDQ3495185

Howard M. Shao, Irving S. Reed

Publication date: 1988

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://semanticscholar.org/paper/deb1e8e68fdd6da53a2be505b8b56e6ed47c55c2

Mathematics Subject Classification ID

Information and communication theory, circuits (94-XX)

This page was built for publication: On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays