Timeout and Calendar Based Finite State Modeling and Verification of Real-Time Systems

DOI10.1007/978-3-540-75596-8_21zbMath1141.68488arXiv1008.1417OpenAlexW3102888608MaRDI QIDQ3510802

Janardan Misra, Suman Roy, Indranil Saha

Publication date: 3 July 2008

Published in: Automated Technology for Verification and Analysis (Search for Journal in Brave)

Full work available at URL: https://arxiv.org/abs/1008.1417

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Related Items (1)

A decidable timeout-based extension of linear temporal logic

Uses Software

• Uppaal

Cites Work

• Unnamed Item
• A theory of timed automata
• What good are digital clocks?
• Computer Aided Verification
• Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems
• Formal Methods for the Design of Real-Time Systems

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