Mechanical Verification of Transactional Memories with Non-transactional Memory Accesses

DOI10.1007/978-3-540-70545-1_13zbMath1155.68430OpenAlexW1823360320MaRDI QIDQ3512488

Amir Pnueli, Lenore D. Zuck, Ariel Cohen

Publication date: 15 July 2008

Published in: Computer Aided Verification (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-70545-1_13

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Related Items (3)

Model checking transactional memories ⋮ Verification of STM on relaxed memory models ⋮ Towards formally specifying and verifying transactional memory

Uses Software

• TLPVS

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