Input mapping algorithm for parallel transistor structures

DOI10.1002/CTA.522zbMath1191.94156OpenAlexW4232738431MaRDI QIDQ3563567

Spiridon Nikolaidis

Publication date: 31 May 2010

Published in: International Journal of Circuit Theory and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1002/cta.522

zbMATH Keywords

parallel structureanalytical modelsCMOS gatesinput mapping algorithm

Mathematics Subject Classification ID

Analytic circuit theory (94C05) Software, source code, etc. for problems pertaining to information and communication theory (94-04)

Cites Work

• CMOS current-steering DAC architectures based on the triple-tail cell
• Analytical estimation of propagation delay and short-circuit power dissipation in CMOS gates
• Analysing the operation of the basic pass transistor structure

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