Decomposition-based logic synthesis for PAL-based CPLDs

DOI10.2478/v10006-010-0027-1zbMath1194.94207OpenAlexW2057209099MaRDI QIDQ3587067

Adam Opara, Dariusz Kania

Publication date: 2 September 2010

Published in: International Journal of Applied Mathematics and Computer Science (Search for Journal in Brave)

Full work available at URL: https://eudml.org/doc/207993

zbMATH Keywords

decompositionBDDCPLDlogic optimizationtechnology mapping

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

Related Items (2)

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Cites Work

• Graph-Based Algorithms for Boolean Function Manipulation
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