Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture

DOI10.1007/11751595_49zbMath1172.94556OpenAlexW1533899961MaRDI QIDQ3600122

Claudia Feregrino-Uribe, Ignacio Algredo-Badillo, Rene Cumplido

Publication date: 10 February 2009

Published in: Computational Science and Its Applications - ICCSA 2006 (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/11751595_49

Mathematics Subject Classification ID

Cryptography (94A60)

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