Efficient Parallel Buffer Structure and Its Management Scheme for a Robust Network-on-Chip (NoC) Architecture

DOI10.1007/978-3-540-89985-3_12zbMath1183.68119OpenAlexW2186241961MaRDI QIDQ3628468

Bahn, Nader Bagherzadeh

Publication date: 20 May 2009

Published in: Communications in Computer and Information Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-89985-3_12

zbMATH Keywords

routernetwork-on-chipon-chip networkvirtual channelparallel buffer

Mathematics Subject Classification ID

Computer system organization (68M99)

Cites Work

• Fault-tolerant wormhole routing algorithms for mesh networks
• Deadlock-Free Message Routing in Multiprocessor Interconnection Networks