Pre-synthesis Optimization for Asynchronous Circuits Using Compiler Techniques

DOI10.1007/978-3-540-89985-3_141zbMath1188.68107OpenAlexW1625213968MaRDI QIDQ3628609

Mehrdad Najibi, Sharareh Zamanzadeh, Hossein Pedram

Publication date: 20 May 2009

Published in: Communications in Computer and Information Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-89985-3_141

zbMATH Keywords

optimizationcompiler techniqueshigh level synthesis of asynchronous circuits

Mathematics Subject Classification ID

Theory of compilers and interpreters (68N20)

Cites Work

• Global optimization by suppression of partial redundancies
• Unnamed Item

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