The Design of Optimal Systolic Arrays
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Publication:3690226
DOI10.1109/TC.1985.1676516zbMath0572.68040OpenAlexW2092863163MaRDI QIDQ3690226
Guo-jie Li, Benjamin W.-S. Wah
Publication date: 1985
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.1985.1676516
deconvolutionVLSIoptimization problemfinite impulse response filteringmatrix multiplicationrecurrence equationsearch spaceperiods of computationspatial distributions of datatriangular-matrix inversionvelocities of data flows
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PROCESSOR-TIME-OPTIMAL SYSTOLIC ARRAYS ⋮ Systolic algorithms as programs ⋮ Systolic processing for dynamic programming problems ⋮ The design of optimal planar systolic arrays for matrix multiplication ⋮ Two-dimensional iterative arrays: Characterizations and applications ⋮ Array resolutions of linear maps ⋮ A NEW APPROACH TO FINDING OPTIMAL LINEAR SCHEDULES FOR UNIFORM DEPENDENCE ALGORITHMS† ⋮ MODULAR FIXED-SIZE VLSI ARCHITECTURES FOR GENERAL MULTISPLITTING ITERATION ⋮ Synthesis, structure and power of systolic computations ⋮ Nonplanar switchable arrays ⋮ Multilayered array computing ⋮ Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays ⋮ Forty-three ways of systolic matrix multiplication ⋮ On high-speed computing with a programmable linear array ⋮ Realization of discrete Fourier transforms using a nesting algorithm ⋮ A systolic architecture for optimal filter design support ⋮ The application of a sequence notation to the design of systolic computations ⋮ Optimal systolic array algorithms for tensor product ⋮ Mapping full‐systolic arrays for matrix product on XILINX's XC4000(E,EX) FPGAs
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