On driving many long wires in a VLSI layout

DOI10.1145/6490.6784zbMath0634.94023OpenAlexW2955418095MaRDI QIDQ3773832

Vijaya Ramachandran

Publication date: 1986

Published in: Journal of the ACM (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1145/6490.6784

zbMATH Keywords

integrated circuitsarea boundscapacitive delaystandard drivers

Mathematics Subject Classification ID

Applications of graph theory to circuits and networks (94C15)

Related Items (1)

A framework for solving VLSI graph layout problems

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