A Characterization of Ternary Simulation of Gate Networks

DOI10.1109/TC.1987.5009471zbMath0641.94030OpenAlexW1974241316MaRDI QIDQ3783220

Carl-Johan H. Seger, Janusz A. Brzozowski

Publication date: 1987

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1987.5009471

zbMATH Keywords

ternary simulationrace detectionsequential networksbehavior of VLSI circuitsasynchronous behaviorBrzozowski-Yoeli conjecturegate network

Mathematics Subject Classification ID

Related Items (4)

An optimistic ternary simulation of gate races ⋮ Generalized ternary simulation of sequential circuits ⋮ Gate circuits in the algebra of transients ⋮ Delay-insensitivity and ternary simulation

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