Floorplans, planar graphs, and layouts
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Publication:3792637
DOI10.1109/31.1739zbMath0647.94025OpenAlexW2102316858MaRDI QIDQ3792637
Shmuel Wimer, Israel Koren, Israel Cederbaum
Publication date: 1988
Published in: IEEE Transactions on Circuits and Systems (Search for Journal in Brave)
Full work available at URL: https://semanticscholar.org/paper/db13513fe50e4fb973b5f98d9fc121f1bbcf3922
network flowgraph model of floorplans and layoutsrectilinear representation of planar graphszero wasted area layout
Deterministic network models in operations research (90B10) Applications of graph theory to circuits and networks (94C15)
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Families of convex tilings ⋮ Drawing Planar Graphs with Prescribed Face Areas ⋮ Aspect ratio universal rectangular layouts ⋮ RECTANGULARLY DUALIZABLE GRAPHS: AREA-UNIVERSALITY ⋮ Completeness for the complexity class \(\forall \exists \mathbb{R}\) and area-universality ⋮ Dynamic maintenance of planar digraphs, with applications ⋮ Orders induced by segments in floorplans and (2-14-3, 3-41-2)-avoiding permutations ⋮ Computing cartograms with optimal complexity ⋮ On the area-universality of triangulations ⋮ Fixed-energy harmonic functions ⋮ A better heuristic for area-compaction of orthogonal representations ⋮ An optimal algorithm for layered wheel floorplan designs ⋮ A nonlinear optimization methodology for VLSI fixed-outline floorplanning ⋮ On Area-Universal Quadrangulations ⋮ On area-efficient drawings of rectangular duals for VLSI floor-plan
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