An efficient algorithm for single and multiple fault test sets generation

DOI10.1080/00207168508803483zbMath0655.94019OpenAlexW2121490257MaRDI QIDQ3803037

Pramode Ranjan Bhattacharjee, Ranajit Kishore Thakur, S. N. Banerjee

Publication date: 1985

Published in: International Journal of Computer Mathematics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/00207168508803483

zbMATH Keywords

combinational circuitsBoolean differencelogical circuitfault test set generation

Mathematics Subject Classification ID

Related Items (1)

Complete test-set generation for bridging faults in combinational-logic circuits

Cites Work

• Analyzing Errors with the Boolean Difference
• Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences
• An Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits
• Boolean Difference Calculus and Fault Finding

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