A fault-tolerant mapping scheme for a configurable multiprocessor system
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Publication:3817568
DOI10.1109/12.16499zbMath0666.68005OpenAlexW2022864439MaRDI QIDQ3817568
Publication date: 1989
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/12.16499
parallel computationfault toleranceparallel processingmultiprocessor systemsystem reconfigurationmultistage interconnection networks
Theory of operating systems (68N25) Theory of software (68N99) Algorithms in computer science (68W99)
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