Scheduling expressions on a pipelined processor with a maximal delay of one cycle

DOI10.1145/59287.59291zbMath0666.68028OpenAlexW2044304745MaRDI QIDQ3817593

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Publication date: 1989

Published in: ACM Transactions on Programming Languages and Systems (Search for Journal in Brave)

Full work available at URL: http://www.acm.org/pubs/contents/journals/toplas/1989-11/

zbMATH Keywords

scheduling

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Related Items (5)

An integer programming approach to optimal basic block instruction scheduling for single-issue processors ⋮ Minimizing makespan for a bipartite graph on a single processor with an integer precedence delay. ⋮ An introduction to compilation issues for parallel machines ⋮ Optimal multiprocessor task scheduling using dominance and equivalence relations ⋮ Optimal loop storage allocation for argument-fetching dataflow machines

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