Check of linear combination circuits

DOI10.1007/BF01075093zbMath0443.94024OpenAlexW2014811226MaRDI QIDQ3887351

V. V. Sapozhnikov

Publication date: 1979

Published in: Cybernetics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01075093

zbMATH Keywords

fault detectioncombinational circuitsminimal testslinear single- channel logic circuits

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Cites Work

• Reduction of the list of single faults in the design of tests for combinational circuits
• THE ABSTRACT THEORY OF AUTOMATA
• Generation of Fault Tests for Linear Logic Networks
• Easily Testable Realizations ror Logic Functions

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