Dual-Mode Logic for Function-Independent Fault Testing

DOI10.1109/TC.1980.1675500zbMath0447.94048OpenAlexW1841996692MaRDI QIDQ3893850

Sumit Dasgupta, Carlos R. P. Hartmann, Luther D. Rudolph

Publication date: 1980

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1980.1675500

zbMATH Keywords

stuck-at-faultsfault testingdual-mode combinational logic networkdual-mode sequential logic networkfunction-independent tests

Mathematics Subject Classification ID

Related Items (6)

The length of a single fault detection test for constant-nonpreserving element insertions ⋮ Complete Fault Detection Tests of Length 2 for Logic Networks under Stuck-at Faults of Gates ⋮ On the exact value of the length of the minimal single diagnostic test for a particular class of circuits ⋮ A method of synthesis of irredundant circuits admitting single fault detection tests of constant length ⋮ Short Complete Fault Detection Tests for Logic Networks with Fan-In Two ⋮ Lower bound of the length of a single fault diagnostic test with respect to insertions of a mod-2 adder

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