A Fault-Tolerant Communication Architecture for Distributed Systems

DOI10.1109/TC.1982.1676101zbMath0488.94049MaRDI QIDQ3950485

Sudhakar M. Reddy, Dhiraj K. Pradhan

Publication date: 1982

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

zbMATH Keywords

computer networkgraph connectivitydistributed architectureself-diagnosisdistributed fault diagnosiscommunication architecture for distributed processorsfault-tolerant communication networksinterconnection network graph diametersstore and forward networks

Mathematics Subject Classification ID

Applications of graph theory to circuits and networks (94C15) Theory of software (68N99)

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A new 3D representation of trivalent Cayley networks ⋮ Fault tolerance of Möbius cubes under two forbidden fault set models ⋮ Communication aspects of networks based on geometric incidence relations ⋮ Large fault-tolerant interconnection networks ⋮ A new approach for routing in arrangement graphs and its performance evaluation ⋮ Upper bounds on the connection probability for 2-D meshes and tori ⋮ Unnamed Item ⋮ Graph theoretic characterization and reliability of the multiple-clique network ⋮ Shortest routing in trivalent Cayley graph network ⋮ Trivalent Cayley graphs for interconnection networks ⋮ Distributed loop network with minimum transmission delay ⋮ Hamiltonian graphs with minimum number of edges for fault-tolerant topologies ⋮ DESIGN OF A PARALLEL INTERCONNECT BASED ON COMMUNICATION PATTERN CONSIDERATIONS ⋮ An algorithm for routing messages between processing elements in a multiprocessor system which tolerates a maximal number of faulty links ⋮ SOFTWARE TOOLS FOR MULTIPROCESSOR SIMULATION AND PROGRAMMING

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