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Publication:3971259
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zbMath0747.94024MaRDI QIDQ3971259

Carl-Johan H. Seger, Janusz A. Brzozowski

Publication date: 25 June 1992


Title: zbMATH Open Web Interface contents unavailable due to conflicting licenses.

zbMATH Keywords

design methodologylogic gatesasynchronous circuitsbounded-delay modelscomplexity of asynchronous circuit analysisMOS switch-level models


Mathematics Subject Classification ID

Research exposition (monographs, survey articles) pertaining to information and communication theory (94-02) Complexity classes (hierarchies, relations among complexity classes, etc.) (68Q15)


Related Items (9)

An exercise in the automatic verification of asynchronous designs ⋮ Model Checking Real-Time Systems ⋮ Constructive semantics for instantaneous reactions ⋮ Generalized ternary simulation of sequential circuits ⋮ An Inverse Method for Parametric Timed Automata ⋮ Unnamed Item ⋮ Unnamed Item ⋮ Automata of asynchronous behaviors ⋮ Denotational fixed-point semantics for constructive scheduling of synchronous concurrency






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