The analysis of digital integrators for test response compaction

DOI10.1109/82.142030zbMath0825.94299OpenAlexW2157010597MaRDI QIDQ4017676

Janusz Rajski, Jerzy Tyszer

Publication date: 16 January 1993

Published in: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/82.142030

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

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