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The efficient memory-based VLSI array designs for DFT and DCT

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Publication:4037605
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DOI10.1109/82.199898zbMath0825.94272OpenAlexW2154807244MaRDI QIDQ4037605

Jiun-In Guo, Chein-Wei Jen, Chi-Min Liu

Publication date: 16 May 1993

Published in: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (Search for Journal in Brave)

Full work available at URL: https://semanticscholar.org/paper/e971253fcd3ef30e34c189ace4e443b1500f0f66



Mathematics Subject Classification ID

Numerical algorithms for specific classes of architectures (65Y10)


Related Items (2)

Hardware efficient fast computation of the discrete Fourier transform ⋮ A low-memory-access length-adaptive architecture for \(2^n\)-point FFT







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