An Algorithm for the Generation of Test Sets for Combinational Logic Networks

DOI10.1109/T-C.1975.224295zbMath0358.94044MaRDI QIDQ4132415

David T. Wang

Publication date: 1975

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Related Items (3)

An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits ⋮ A complete critical path algorithm for test generation of combinational circuits ⋮ Electronic circuit diagnostic expert systems - a survey

This page was built for publication: An Algorithm for the Generation of Test Sets for Combinational Logic Networks