Effective Pipelining of Digital Systems

DOI10.1109/TC.1978.1675205zbMath0399.94021OpenAlexW118676065MaRDI QIDQ4184771

S. R. Ahuja, J. Robert Jump

Publication date: 1978

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1978.1675205

zbMATH Keywords

delaycost-effectivenessaverage timelogical designcellular arraysalgorithms for integer multiplicationpipelined digital systems

Mathematics Subject Classification ID

Cellular automata (computational aspects) (68Q80)

Related Items (3)

Implementation of matrix decomposition structures of 2-D digital filters via VLSI array processors ⋮ Fast implementation of direct robot kinematics with cordic systolic arrays ⋮ FAST IMPLEMENTATION OF MULTIVARIABLE LINEAR SYSTEMS VIA VLSI ARRAY PROCESSORS

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