Design of data format converters using two-dimensional register allocation
From MaRDI portal
Publication:4220999
DOI10.1109/82.663807zbMath0911.68183OpenAlexW2032142864MaRDI QIDQ4220999
Mayukh Majumdar, Keshab K. Parhi
Publication date: 7 March 1999
Published in: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/82.663807
Pattern recognition, speech recognition (68T10) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)
Related Items (2)
Cloud computing in cryptography and steganography ⋮ Stride permutation networks for array processors
This page was built for publication: Design of data format converters using two-dimensional register allocation