A remark on "Reducing iteration time when result digit is zero for radix-2 SRT division and square root with redundant remainders"

DOI10.1109/12.368000zbMath1061.68502OpenAlexW4238743000WikidataQ60350199 ScholiaQ60350199MaRDI QIDQ4419616

Luigi Ciminiera, P. Montuschi

Publication date: 15 October 2003

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.368000

zbMATH Keywords

digit selection mechanism

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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