The importance of prepass code scheduling for superscalar and superpipelined processors

DOI10.1109/12.372029zbMath1062.68529OpenAlexW2102333133MaRDI QIDQ4419657

Pohua P. Chang, Wen-Mei W. Hwu, Daniel M. Lavery, Scott A. Mahlke, William Yun Chen

Publication date: 15 October 2003

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: http://hdl.handle.net/2142/74514

zbMATH Keywords

register allocationcode optimizer

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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