Equivalence proofs of some yield modeling methods for defect-tolerant integrated circuits

DOI10.1109/12.381962zbMath1041.68505OpenAlexW2166590960MaRDI QIDQ4419712

Yvon Savaria, J. L. Houle, Claude Thibeault

Publication date: 1995

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.381962

zbMATH Keywords

model equivalencedefect tolerance

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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