Hyperneural network-an efficient model for test generation in digital circuits

DOI10.1109/12.481493zbMath1058.68600OpenAlexW2133770625MaRDI QIDQ4420918

Weian Deng, Suresh Rai

Publication date: 2 November 2003

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.481493

zbMATH Keywords

satisfiability problempseudo-Boolean programminglogic circuit testing

Mathematics Subject Classification ID

Learning and adaptive systems in artificial intelligence (68T05) Fault detection; testing in circuits and networks (94C12)

This page was built for publication: Hyperneural network-an efficient model for test generation in digital circuits