On routability for FPGAs under faulty conditions

DOI10.1109/12.475125zbMath1054.68525OpenAlexW2104136310MaRDI QIDQ4421147

Kaushik Roy, Sudip Nag

Publication date: 1995

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.475125

zbMATH Keywords

fault-tolerancearchitecture-synthesis

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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