Performance evaluation of the slotted ring multiprocessor

DOI10.1109/12.392846zbMath1057.68539OpenAlexW2056811268MaRDI QIDQ4421224

Michel Dubois, Luiz André Barroso

Publication date: 10 November 2003

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://semanticscholar.org/paper/580dd2000cfff88707a9ca2cc7904d4304c15215

zbMATH Keywords

shared memory multiprocessorsCache coherence protocols

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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