VLSI design of 1-D DWT architecture with parallel filters

DOI10.1016/S0167-9260(00)00007-9zbMath0952.68015OpenAlexW4298859132MaRDI QIDQ4520155

Rached Tourki, Kholdoun Torki, Chokri Souani, Mohamed Amine Abid

Publication date: 12 December 2000

Published in: Integration (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0167-9260(00)00007-9

zbMATH Keywords

discrete wavelet transformVLSI designDWT processornew optimized architectureparallel filters

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Computer system organization (68M99)

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