Feasibility analysis for robustness quantification by symbolic model checking

DOI10.1007/s10703-011-0121-5zbMath1247.68156OpenAlexW2087761502MaRDI QIDQ453480

Sana Younes, Jean-Michel Ilié, Isabelle Mounier, Denis Poitrenaud, Souheib Baarir, Emmanuelle Encrenaz, Cécile Braunstein

Publication date: 27 September 2012

Published in: Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10703-011-0121-5

zbMATH Keywords

symbolic model checkingbounded model checkingcircuit robustness evaluationdependability analysissoft errors

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12) Specification and verification (program logics, model checking, etc.) (68Q60)

Related Items (1)

Towards Robustness Analysis Using PVS

Uses Software

• sharpSAT

Cites Work

• Automatic verification of finite-state concurrent systems using temporal logic specifications
• Self-stabilizing systems in spite of distributed control
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