Complete Fault Detection Tests of Length 2 for Logic Networks under Stuck-at Faults of Gates

DOI10.1134/S1990478918020102zbMath1424.94101OpenAlexW2806745257MaRDI QIDQ4558289

Kirill A. Popkov

Publication date: 21 November 2018

Published in: Journal of Applied and Industrial Mathematics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1134/s1990478918020102

zbMATH Keywords

stuck-at faultlogic networkcomplete fault detection test

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Related Items (2)

The length of a single fault detection test for constant-nonpreserving element insertions ⋮ Short Complete Fault Detection Tests for Logic Networks with Fan-In Two

Cites Work

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• On the synthesis of circuits admitting complete fault detection test sets of constant length under arbitrary constant faults at the outputs of the gates
• On the exact value of the length of the minimal single diagnostic test for a particular class of circuits

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