Adaptive Channel Buffers in On-Chip Interconnection Networks— A Power and Performance Analysis

DOI10.1109/TC.2008.77zbMath1390.68059MaRDI QIDQ4564074

Ashwini Sarathy, Avinash Karanth Kodi, Ahmed Louri

Publication date: 12 June 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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