Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems

DOI10.1109/TC.2007.1073zbMath1391.94905MaRDI QIDQ4564225

Jacob A. Abraham, Vinod Viswanath, Robert W. Sumners, Shobha Vasudevan

Publication date: 12 June 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Analytic circuit theory (94C05) Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30)

Related Items (2)

Formal Verification of Integer Multiplier Circuits Using Algebraic Reasoning: A Survey ⋮ GenMul: Generating Architecturally Complex Multipliers to Challenge Formal Verification Tools

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