A Defect Tolerance Scheme for Nanotechnology Circuits

DOI10.1109/TCSI.2007.907875zbMath1374.94960OpenAlexW2036360385MaRDI QIDQ4590263

Sundarkumar Ramsundar, Dhiraj K. Pradhan, Ahmad Al-Yamani

Publication date: 20 November 2017

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tcsi.2007.907875

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Fault detection; testing in circuits and networks (94C12)

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