A universal architecture for designing efficient modulo 2/sup n/+1 multipliers
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Publication:4590454
DOI10.1109/TCSI.2005.849143zbMath1374.68019WikidataQ59357599 ScholiaQ59357599MaRDI QIDQ4590454
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Publication date: 20 November 2017
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)
Number-theoretic algorithms; complexity (11Y16) Mathematical problems of computer architecture (68M07)
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