Reconfiguration Graph Grammar for massively parallel, fault tolerant computers

DOI10.1007/3-540-61228-9_87zbMath1412.68023OpenAlexW1520343333MaRDI QIDQ4645276

Linda Debrunner, M. D. Derk

Publication date: 10 January 2019

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/3-540-61228-9_87

zbMATH Keywords

fault tolerancegraph grammarprocessor arrayfaulty nodenonterminal symbol

Mathematics Subject Classification ID

Grammars and rewriting systems (68Q42) Reliability, testing and fault tolerance of networks and computer systems (68M15)

Cites Work

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