FPGA implementation of a Cholesky algorithm for a shared-memory multiprocessor architecture

DOI10.1080/10637190412331279957zbMath1063.68019OpenAlexW2064328715MaRDI QIDQ4665365

Satchidanand G. Haridas, Sotirios G. Ziavras

Publication date: 11 April 2005

Published in: Parallel Algorithms and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/10637190412331279957

zbMATH Keywords

performance evaluationmatrix inversionparallel Cholesky factorization

Mathematics Subject Classification ID

Distributed systems (68M14) Direct numerical methods for linear systems and matrix inversion (65F05) Numerical algorithms for specific classes of architectures (65Y10)

Related Items (1)

Sparse Cholesky factorization on FPGA using parameterized model

Uses Software

• symrcm

Cites Work

• Parallel Cholesky factorization on a shared-memory multiprocessor
• The Role of Elimination Trees in Sparse Factorization
• Parallel Algorithms for Sparse Linear Systems
• The Multifrontal Method for Sparse Matrix Solution: Theory and Practice
• A Supernodal Approach to Sparse Partial Pivoting
• The multifrontal method and paging in sparse Cholesky factorization
• Unnamed Item

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