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Analysis of the input to a buffer storage in front of a packet switch - MaRDI portal

Analysis of the input to a buffer storage in front of a packet switch

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Publication:4718652

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DOI10.1080/02522667.1996.10699270zbMath0863.90064OpenAlexW2090312827MaRDI QIDQ4718652

Gerrit K. Janssens

Publication date: 8 December 1996

Published in: Journal of Information and Optimization Sciences (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/02522667.1996.10699270

zbMATH Keywords

performance analysis Poisson process buffer digital telecommunications packet switches

Mathematics Subject Classification ID

Communication networks in operations research (90B18) Queueing theory (aspects of probability theory) (60K25) Queues and service in operations research (90B22)

Cites Work

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