A graph-theoretic via minimization algorithm for two-layer printed circuit boards

DOI10.1109/TCS.1983.1085357zbMath0505.94031MaRDI QIDQ4742710

Yoji Kajitani, Ray Ruen-Wu Chen, Shu Park Chan

Publication date: 1983

Published in: IEEE Transactions on Circuits and Systems (Search for Journal in Brave)

zbMATH Keywords

polynomial timepreassignment of line segments

Mathematics Subject Classification ID

Applications of graph theory to circuits and networks (94C15)

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