FOLDING TECHNIQUES FOR SYSTOLIC ITERATIONS

DOI10.1080/10637199508915524zbMath1049.68916OpenAlexW2040677443MaRDI QIDQ4820123

Konstantinos G. Margaritis, David J. Evans

Publication date: 6 October 2004

Published in: Parallel Algorithms and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/10637199508915524

Mathematics Subject Classification ID

Parallel algorithms in computer science (68W10)

Related Items (1)

Matrix-vector multiplication on a fixed-size linear systolic array

Cites Work

• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item
• On the systolic implementation of associative memory artificial neural networks
• Implementation of folding transformations on linear VSLI processor arrays
• A re-usable systolic array for matrix-vector multiplication

This page was built for publication: FOLDING TECHNIQUES FOR SYSTOLIC ITERATIONS