On avoiding spare aborts in transactional memory

DOI10.1007/S00224-015-9607-7zbMath1320.68055OpenAlexW2043481764MaRDI QIDQ493661

Dmitri Perelman, Idit Keidar

Publication date: 4 September 2015

Published in: Theory of Computing Systems (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s00224-015-9607-7

zbMATH Keywords

transactional memory

Mathematics Subject Classification ID

Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30)

Related Items (4)

Transactional scheduling for read-dominated workloads ⋮ A single-version STM that is multi-versioned permissive ⋮ Inherent limitations on disjoint-access parallel implementations of transactional memory ⋮ SMV: Selective Multi-Versioning STM

Cites Work

• Permissiveness in Transactional Memories
• The serializability of concurrent database updates
• Transactional contention management as a non-clairvoyant scheduling problem
• Software transactional memory
• From causal to z-linearizable transactional memory

This page was built for publication: On avoiding spare aborts in transactional memory