Faster Carry Bit Computation for Adder Circuits with Prescribed Arrival Times

DOI10.1145/3340321zbMath1454.68048arXiv1710.08267OpenAlexW2808107703MaRDI QIDQ4973041

Anna Hermann, Ulrich Brenner

Publication date: 2 December 2019

Published in: ACM Transactions on Algorithms (Search for Journal in Brave)

Full work available at URL: https://arxiv.org/abs/1710.08267

zbMATH Keywords

delayaddersand-or pathscarry bitsnon-uniform arrival times

Mathematics Subject Classification ID

Networks and circuits as models of computation; circuit complexity (68Q06)

Related Items (1)

Constructing depth-optimum circuits for adders and \textsc{And}-\textsc{Or} paths

This page was built for publication: Faster Carry Bit Computation for Adder Circuits with Prescribed Arrival Times