Scalable and Unified Digit-Serial Processor Array Architecture for Multiplication and Inversion Over GF( $2^{m}$ )
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Publication:5007213
DOI10.1109/TCSI.2017.2691353zbMath1468.94646DBLPjournals/tcas/IbrahimG17OpenAlexW2614842594WikidataQ59192024 ScholiaQ59192024MaRDI QIDQ5007213
Publication date: 26 August 2021
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tcsi.2017.2691353
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