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Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage - MaRDI portal

Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage

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Publication:5007718

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DOI10.1109/TCSI.2014.2370171zbMath1468.94824MaRDI QIDQ5007718

Tsukasa Tokutomi, Hiroki Yamazawa, Shuhei Tanakamaru, Sheyang Ning, Ken-Ichi Takeuchi

Publication date: 26 August 2021

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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