Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data

DOI10.1109/TCSI.2015.2495724zbMath1468.94738MaRDI QIDQ5008112

Sujit Kumar Patel, B. K. Mohanty, Thambipillai Srikanthan, Pramod Kumar Meher, Soumya Kanti Ganguly

Publication date: 26 August 2021

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Mathematics Subject Classification ID

Numerical methods for discrete and fast Fourier transforms (65T50) Analytic circuit theory (94C05)

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