A Frequency-Based Model for Limit Cycle and Spur Predictions in Bang-Bang All Digital PLL
DOI10.1109/TCSI.2011.2173395zbMATH Open1468.94704OpenAlexW2069191157MaRDI QIDQ5008810
Author name not available (Why is that?)
Publication date: 26 August 2021
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tcsi.2011.2173395
Topological structure of integral curves, singular points, limit cycles of ordinary differential equations (34C05) Digital control/observation systems (93C62) Analytic circuit theory (94C05)
Related Items (1)
Recommendations
- Frequency oscillations estimates for digital phase-locked loops 👍 👎
- Analysis of a digital PLL Markov model 👍 👎
- Prediction of Phase Noise and Spurs in a Nonlinear Fractional-${N}$ Frequency Synthesizer 👍 👎
- A Linearized Model for the Design of Fractional-<formula formulatype="inline"><tex Notation="TeX">$N$</tex></formula> Digital PLLs Based on Dual-Mode Ring Oscillator FDCs 👍 👎
- An All-Digital PLL Frequency Synthesizer With an Improved Phase Digitization Approach and an Optimized Frequency Calibration Technique 👍 👎
- Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops 👍 👎
- On Pulse Position Modulation and Its Application to PLLs for Spur Reduction 👍 👎
- PREDICTING THE JITTER OF PLL–DLL BASED FREQUENCY SYNTHESIZERS 👍 👎
This page was built for publication: A Frequency-Based Model for Limit Cycle and Spur Predictions in Bang-Bang All Digital PLL
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q5008810)
