Settling Time Optimization for Three-Stage CMOS Amplifier Topologies

DOI10.1109/TCSI.2009.2017133zbMath1468.94772MaRDI QIDQ5010861

Giuseppe Cocorullo, Andrea Pugliese, Francesco Amoroso, Gregorio Cappuccino

Publication date: 26 August 2021

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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