Accelerating BLAS and LAPACK via Efficient Floating Point Architecture Design

DOI10.1142/S0129626417500062zbMath1492.65375arXiv1610.08705MaRDI QIDQ5087834

Anupam Chattopadhyay, Samir Kumar Nandy, Farhad Merchant, Soumyendu Raha, Ranjani Narayan

Publication date: 4 July 2022

Published in: Parallel Processing Letters (Search for Journal in Brave)

Full work available at URL: https://arxiv.org/abs/1610.08705

zbMATH Keywords

parallel computinghigh-performance computingfloating point unitinstruction level parallelismpower-performance trade-offs

Mathematics Subject Classification ID

Parallel numerical computation (65Y05) Numerical linear algebra (65Fxx) Numerical algorithms for specific classes of architectures (65Y10)

Uses Software

• LAPACK
• BLAS
• Caffe

Cites Work

• LAPACK Users' Guide
• Exploiting fast matrix multiplication within the level 3 BLAS
• Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator

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